Last Updates:

  • 07-09-2018: Le prove scritte degli appelli della sessione autunnale si terranno il 20-09-2018 alle ore 9 in aula C2 e il 28-09-2018 alle ore 16 in aula C3.
  • 23-07-2018: Risultati della prova scritta del 13-07-2018. La prova orale si terrà il 24-07-2018 a partire dalle ore 10 presso lo studio del docente.
  • 27-06-2018: Risultati della prova scritta del 19-06-2018. La prova orale si terrà nei giorni 9-10-11-12 Luglio a partire dalle ore 10 presso lo studio del docente.
  • 06-06-2018: Gli appelli della sessione estiva si terranno nei giorni 19-06-2018 ore 10 in aula 6 e 13-07-2018 ore 15 in aula C2. 

Professor: Marco Re

E-mail: This email address is being protected from spambots. You need JavaScript enabled to view it. 

Tel.: +39 06 72597370


Course Description

The course...


Book: Introduction to Digital Systems

Authors: Milos Ercegovac, Tomas Lang, Jaime H. Moreno

Course Program second part:

  • Specification of Combinational Systems: definitions and specification level, data representation and coding, binary specification of combinational systems.
  • Combinational Integrated Circuits - Characteristics and Capabilities: representation of binary variables, structure and operation of CMOS gates, propagation delays, voltage variations and noise margins, power dissipation and delay-power product, Buses and three-state drivers, circuit characterization of a CMOS-family.
  • Description and Analysis of Gate Networks: definition, description and characteristics, sets of gates.
  • Design o f Combinational Systems - two-level gate networks: minimal two-level networks, Karnaugh maps, minimization of sum of products and product of sums, design of multiple-output two-level gate networks, two-level NAND-NAND and NOR-NOR networks, limitations of two-level networks, programmable modules: PLA and PLA.
  • Design of Combinational Systems - Multilevel Gates Networks: transformations, alternative implementations, networks with XOR and XNOR gates, networks with two-input multiplexers.
  • Specification of Sequential Systems: synchronous sequential systems, representation of the state transition and output functions, time behavior and finite state machines, finite memory sequential systems, controllers, equivalent sequential systems and minimization of the number of states, binary specification of sequential systems, specification of different types of sequential systems.
  • Sequential Networks: canonical form, high-level and binary implementations, gated latch and D flip-flop, timing characteristics, analysis of canonical sequential networks, design of canonical sequential networks, other flip-flop modules: SR, JK, T, analysis of networks with flip-flops, design using special state assignments.

Teaching Material (only for registerd users)

 Seconda parte (prof. Marco Re)  

 

We would like to thank XILINX for the hardware and software donation.