Khanal, G.M., Acciarito, S., Cardarilli, G.C., Chakraborty, A., Di Nunzio, L., Fazzolari, R., Cristini, A., Re, M., Susi, G.
Synaptic behaviour in ZnO-rGO composites thin film memristor
(2017) Electronics Letters, 53 (5), pp. 296-298. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85015362900&doi=10.1049%2fel.2016.3655&partnerID=40&md5=76d5bc4c2ffd6a20c510549d75f1b618

DOI: 10.1049/el.2016.3655

Esposito, A., Lomuscio, A., Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Nannarelli, A., Re, M.
Dynamically-loaded Hardware Libraries (HLL) technology for audio applications
(2017) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 7869175, pp. 882-886. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85016301903&doi=10.1109%2fACSSC.2016.7869175&partnerID=40&md5=5580d4680e51d8a237f99a2edd3e4c95

DOI: 10.1109/ACSSC.2016.7869175

Lomuscio, A., Cardarilli, G.C., Nannarelli, A., Re, M.
A hardware framework for on-chip FPGA acceleration
(2017) 2016 International Symposium on Integrated Circuits, ISIC 2016, art. no. 7829683, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85013843211&doi=10.1109%2fISICIR.2016.7829683&partnerID=40&md5=4fb82e7e8d258e6fd945f658f0351b17

DOI: 10.1109/ISICIR.2016.7829683

Acciarito, S., Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M.
A wireless sensor node based on microbial fuel cell
(2017) Lecture Notes in Electrical Engineering, 409, pp. 143-150. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008490056&doi=10.1007%2f978-3-319-47913-2_17&partnerID=40&md5=3e26c6dfbafa23f9c4f352b7708f691f

DOI: 10.1007/978-3-319-47913-2_17

Giuliani, F., Ottavi, M., Cardarilli, G.C., Re, M., Di Nunzio, L., Fazzolari, R., Bruno, A., Zuliani, F.
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams
(2016) 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, art. no. 7684080, pp. 111-114. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84999288548&doi=10.1109%2fDFT.2016.7684080&partnerID=40&md5=ce556acd8cf26037dc935406f6ad2ead

DOI: 10.1109/DFT.2016.7684080

Khanal, G.M., Cardarilli, G., Chakraborty, A., Acciarito, S., Mulla, M.Y., Di Nunzio, L., Fazzolari, R., Re, M.
A ZnO-rGO composite thin film discrete memristor
(2016) IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE, 2016-September, art. no. 7573608, pp. 129-132. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84990948228&doi=10.1109%2fSMELEC.2016.7573608&partnerID=40&md5=83eb6d44792c24757739adc4a559717d

DOI: 10.1109/SMELEC.2016.7573608

Cardarilli, G.C., Di Carlo, L., Nannarelli, A., Pandolfi, F.M., Re, M.
A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration
(2016) 2015 IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2015, art. no. 7394346, pp. 291-296. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84963837824&doi=10.1109%2fISSPIT.2015.7394346&partnerID=40&md5=14fb5b5aa1ff0d614ef4978775cd5f04

DOI: 10.1109/ISSPIT.2015.7394346

Cardarilli, G.C., Nannarelli, A., Petricca, M., Re, M.
Characterization of RNS multiply-add units for power efficient DSP
(2015) Midwest Symposium on Circuits and Systems, 2015-September, art. no. 7282052, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84962053209&doi=10.1109%2fMWSCAS.2015.7282052&partnerID=40&md5=7579a03cf7f06a78db5b05599dcd290f

DOI: 10.1109/MWSCAS.2015.7282052

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M.
TDES cryptography algorithm acceleration using a reconfigurable functional unit
(2015) 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014, art. no. 7050011, pp. 419-422. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84925428078&doi=10.1109%2fICECS.2014.7050011&partnerID=40&md5=ea3fcc59dad013253f33c1f76c85ddcc

DOI: 10.1109/ICECS.2014.7050011

Fereidountabar, A., Cardarilli, G.C., Re, M.
High dynamic optimized carrier loop improvement for tracking doppler rates
(2015) Journal of Electrical and Computer Engineering, 2015, art. no. 679505, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84942280068&doi=10.1155%2f2015%2f679505&partnerID=40&md5=028ef4909cd94694406510646abd161f

DOI: 10.1155/2015/679505

Fereidotmtabar, A., Cardarilli, G.C.
Radio link design for unmanned aerial vehicles (UAVS) WITH SQAM/TQAM configuration and alamouti/STBC codes
(2015) International Journal on Communications Antenna and Propagation, 5 (4), pp. 241-247. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84944451558&partnerID=40&md5=ca4b9a509c351d8e3d2f210678cd3d38


Albicocco, P., Cardarilli, G.C., Nannarelli, A., Re, M.
Twenty years of research on RNS for DSP: Lessons learned and future perspectives
(2015) Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, art. no. 7029575, pp. 436-439. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84924303261&doi=10.1109%2fISICIR.2014.7029575&partnerID=40&md5=fff92370fd3c344eb2ee007f67aa89cc

DOI: 10.1109/ISICIR.2014.7029575

Fereidountabar, A., Cardarilli, G.C., Di Nunzio, L., Fazzolari, R.
UAV Channel Estimation with STBC in MIMO Systems
(2015) Procedia Computer Science, 73, pp. 426-434. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84962736766&doi=10.1016%2fj.procs.2015.12.019&partnerID=40&md5=085ad5f7050feb76e59e2c7e103fa4f4

DOI: 10.1016/j.procs.2015.12.019

Cardarilli, G.C., Re, M., Shuli, I.
High performance bit-stream decompressor for partial reconfigurable FPGAs
(2014) Lecture Notes in Electrical Engineering, 289, pp. 133-140. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84927709632&doi=10.1007%2f978-3-319-04370-8_12&partnerID=40&md5=29d7148d03254364a4db4789d4bee6bf

DOI: 10.1007/978-3-319-04370-8_12

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Pontarelli, S., Re, M.
A reconfigurable functional unit for modular operations
(2014) Lecture Notes in Electrical Engineering, 289, pp. 141-152. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84927738912&doi=10.1007%2f978-3-319-04370-8_13&partnerID=40&md5=349a8273db1ce440588e1a9a95099f06

DOI: 10.1007/978-3-319-04370-8_13

Cardarilli, G.C., Re, M., Shuli, I., Simone, L.
Compressive sensing spectrum analysis for space autonomous radio receivers
(2013) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6810326, pp. 492-494. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84901269173&doi=10.1109%2fACSSC.2013.6810326&partnerID=40&md5=401e485242f2b5c985d7fc6d0ce59b7b

DOI: 10.1109/ACSSC.2013.6810326

Albicocco, P., Cardarilli, G.C., Nannarelli, A., Petricca, M., Re, M.
Truncated multipliers through power-gating for degrading precision arithmetic
(2013) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6810694, pp. 2172-2176. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84901267776&doi=10.1109%2fACSSC.2013.6810694&partnerID=40&md5=b9478f1e84a316ad7677a8b31e4f8a49

DOI: 10.1109/ACSSC.2013.6810694

Cardarilli, G.C., Cristini, A., Di Nunzio, L., Re, M., Salerno, M., Susi, G.
Spiking neural networks based on LIF with latency: Simulation and synchronization effects
(2013) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6810620, pp. 1838-1842. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84901268650&doi=10.1109%2fACSSC.2013.6810620&partnerID=40&md5=240caac6fd3529c2b3d45f5883ee3291

DOI: 10.1109/ACSSC.2013.6810620

Albicocco, P., Cardarilli, G.C., Pontarelli, S., Re, M.
Karatsuba implementation of FIR filters
(2012) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6489192, pp. 1111-1114. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84876232846&doi=10.1109%2fACSSC.2012.6489192&partnerID=40&md5=6f00c03bdd1af38a0c95fb8a4b700b0c

DOI: 10.1109/ACSSC.2012.6489192

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M., Lee, R.B.
Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving
(2012) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6489268, pp. 1457-1459. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84876206961&doi=10.1109%2fACSSC.2012.6489268&partnerID=40&md5=ca713de9a6519eecd5d841614ab4eb17

DOI: 10.1109/ACSSC.2012.6489268

Petricca, M., Albicocco, P., Cardarilli, G.C., Nannarelli, A., Re, M.
Power efficient design of parallel/serial FIR filters in RNS
(2012) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6489171, pp. 1015-1019. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84876272128&doi=10.1109%2fACSSC.2012.6489171&partnerID=40&md5=101152f0ecd11acc2749f1a590208721

DOI: 10.1109/ACSSC.2012.6489171

Albicocco, P., Cardarilli, G.C., Nannarelli, A., Petricca, M., Re, M.
Imprecise arithmetic for low power image processing
(2012) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6489164, pp. 983-987. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84876275540&doi=10.1109%2fACSSC.2012.6489164&partnerID=40&md5=eb690909e403812358216e6c138b04db

DOI: 10.1109/ACSSC.2012.6489164

Pontarelli, S., Cardarilli, G.C., Re, M., Salsano, A.
Optimized implementation of RNS FIR filters based on FPGAs
(2012) Journal of Signal Processing Systems, 67 (3), pp. 201-212. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84871484640&doi=10.1007%2fs11265-010-0537-y&partnerID=40&md5=f9ce9c2e20e8d6376f0dba35c27e6b95

DOI: 10.1007/s11265-010-0537-y

Quitadamo, L.R., Abbafati, M., Cardarilli, G.C., Mattia, D., Cincotti, F., Babiloni, F., Marciani, M.G., Bianchi, L.
Evaluation of the performances of different P300 based brain-computer interfaces by means of the efficiency metric
(2012) Journal of Neuroscience Methods, 203 (2), pp. 361-368. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-82055185457&doi=10.1016%2fj.jneumeth.2011.10.010&partnerID=40&md5=c81f94e7b4819872477cddc1a30332e2

DOI: 10.1016/j.jneumeth.2011.10.010

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M.
Fine-grain reconfigurable functional unit for embedded processors
(2011) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 6190048, pp. 488-492. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84861313361&doi=10.1109%2fACSSC.2011.6190048&partnerID=40&md5=c71fdade469fb29564f1e17bf3afe761

DOI: 10.1109/ACSSC.2011.6190048

Albicocco, P., Cardarilli, G.C., Nannarelli, A., Petricca, M., Re, M.
Degrading precision arithmetics for low-power FIR implementation
(2011) Midwest Symposium on Circuits and Systems, art. no. 6026265, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-80053650613&doi=10.1109%2fMWSCAS.2011.6026265&partnerID=40&md5=cab4f378b281fbb3204145377ae4ce46

DOI: 10.1109/MWSCAS.2011.6026265

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Pontarelli, S., Re, M., Salsano, A.
Implementation of the AES algorithm using a Reconfigurable Functional Unit
(2011) ISSCS 2011 - International Symposium on Signals, Circuits and Systems, Proceedings, art. no. 5978668, pp. 97-100. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-80052623536&doi=10.1109%2fISSCS.2011.5978668&partnerID=40&md5=ef007d855551c3ec6247ad828993a9b6

DOI: 10.1109/ISSCS.2011.5978668

Cardarilli, G.C., D'Alessio, M., Di Nunzio, L., Fazzolari, R., Murgia, D., Re, M.
FPGA implementation of a low-area/high-SFDR DDFS architecture
(2011) ISSCS 2011 - International Symposium on Signals, Circuits and Systems, Proceedings, art. no. 5978667, pp. 93-96. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-80052635994&doi=10.1109%2fISSCS.2011.5978667&partnerID=40&md5=c59a68192fde93c06df43b8b654037df

DOI: 10.1109/ISSCS.2011.5978667

Cardarilli, G.C., Re, M., Shuli, I., Simone, L.
Partial reconfiguration in the implementation of autonomous radio receivers for space
(2011) 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2011 - Proceedings, art. no. 5981511, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-80052574751&doi=10.1109%2fReCoSoC.2011.5981511&partnerID=40&md5=8c5698795c61d632f0d92b240b43f85b

DOI: 10.1109/ReCoSoC.2011.5981511

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M., Lee, R.B.
Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor
(2010) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5757737, pp. 1279-1283. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-79957987491&doi=10.1109%2fACSSC.2010.5757737&partnerID=40&md5=1684685478ccf6426fa0a70a30fe8830

DOI: 10.1109/ACSSC.2010.5757737

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Lenci, C., Re, M.
VLSI implementation of reconfigurable cells for RFU in embedded processors
(2010) 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings, art. no. 5724728, pp. 1180-1183. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-79953088921&doi=10.1109%2fICECS.2010.5724728&partnerID=40&md5=8cc771453500a1f286c19ffda49d6a49

DOI: 10.1109/ICECS.2010.5724728

Petricca, M., Cardarilli, G.C., Nannarelli, A., Re, M., Albicocco, P.
Degrading precision arithmetic for low power signal processing
(2010) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5757713, pp. 1163-1167. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-79957998966&doi=10.1109%2fACSSC.2010.5757713&partnerID=40&md5=e7f39d443ce5ca4eca716df92c6d1064

DOI: 10.1109/ACSSC.2010.5757713

Cardarilli, G.C., Nannarelli, A., Oster, Y., Petricca, M., Re, M.
Design of large polyphase filters in the quadratic residue number system
(2010) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5757589, pp. 410-413. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-79957989150&doi=10.1109%2fACSSC.2010.5757589&partnerID=40&md5=7da858a0ef067ffbbc72ab8d73084458

DOI: 10.1109/ACSSC.2010.5757589

Cardarilli, G.C., Di Nunzio, L., Fazzolari, R., Re, M.
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit
(2010) WISES 2010 - 2010 8th IEEE Workshop on Intelligent Solutions in Embedded Systems, art. no. 5548433, pp. 6-11. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77956548975&doi=10.1109%2fWISES.2010.5548433&partnerID=40&md5=833c8b0fa531d2446f43fe1f26306809

DOI: 10.1109/WISES.2010.5548433

Cardarilli, G.C., Nannarelli, A., Re, M.
On the comparison of different number systems in the implementation of complex FIR filters
(2010) IFIP Advances in Information and Communication Technology, 313, pp. 174-190. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77951126702&doi=10.1007%2f978-3-642-12267-5_10&partnerID=40&md5=060f6808bf06572450fe549c12492092

DOI: 10.1007/978-3-642-12267-5_10

Pontarelli, S., Cardarilli, G.C., Re, M., Salsano, A.
Error correction codes for SEU and SEFI tolerant memory systems
(2009) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, art. no. 5372229, pp. 425-430. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77649332312&doi=10.1109%2fDFT.2009.8&partnerID=40&md5=2d4e3e8356e72316ff72cf2e3813543a

DOI: 10.1109/DFT.2009.8

Shuli, I., Petricca, M., Cardarilli, G.C., Nannarelli, A., Re, M.
Multiple constant multiplication through residue number system
(2009) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5469949, pp. 736-739. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77953855286&doi=10.1109%2fACSSC.2009.5469949&partnerID=40&md5=cbc35cb260a12f2d1ec3803251fd0a13

DOI: 10.1109/ACSSC.2009.5469949

Petricca, M., Li, H., Forchhammer, S., Nannarelli, A., Re, M., Andersen, J.D., Cardarilli, G.C.
Hardware implementation of MPEG analysis and deblocking for video enhancement
(2009) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5469955, pp. 754-758. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77953829240&doi=10.1109%2fACSSC.2009.5469955&partnerID=40&md5=a15fc939cd7b8e71659a954cda5210d8

DOI: 10.1109/ACSSC.2009.5469955

Pontarelli, S., Cardarilli, G.C., Re, M., Salsano, A.
Error detection in addition chain based ECC point multiplication
(2009) 2009 15th IEEE International On-Line Testing Symposium, IOLTS 2009, art. no. 5196010, pp. 192-194. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70449442754&doi=10.1109%2fIOLTS.2009.5196010&partnerID=40&md5=9c0a28e14866cec644755c332c1e031c

DOI: 10.1109/IOLTS.2009.5196010

Quitadamo, L.R., Abbafati, M., Saggio, G., Cardarilli, G.C., Marciani, M.G., Bianchi, L.
Efficiency of a BCI system in a visual P300 protocol with different stimulation intervals
(2009) Proceedings of the 2009 1st International Conference on Wireless Communication, Vehicular Technology, Information Theory and Aerospace and Electronic Systems Technology, Wireless VITAE 2009, art. no. 5172527, pp. 670-673. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70350772381&doi=10.1109%2fWIRELESSVITAE.2009.5172527&partnerID=40&md5=7092ec0b27bc7c330c4971ccfa7cdb59

DOI: 10.1109/WIRELESSVITAE.2009.5172527

Cardarilli, G.C., Di Nunzio, L., Re, M.
Arithmetic/logic blocks for fine-grained reconfigurable units
(2009) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 5118184, pp. 2001-2004. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70350167351&doi=10.1109%2fISCAS.2009.5118184&partnerID=40&md5=e21bdf9ebf96ae85b4e72e126a852cc7

DOI: 10.1109/ISCAS.2009.5118184

Cardarilli, G.C., Di Nunzio, L., Re, M.
Speed-up of RISC processor computation using ADAPTO
(2009) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 5118241, pp. 2229-2232. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70350151876&doi=10.1109%2fISCAS.2009.5118241&partnerID=40&md5=bb5a19db1540da599f152449535a4b66

DOI: 10.1109/ISCAS.2009.5118241

Cardarilli, G.C., Re, M., Di Carlo, L.
Improved large-signal model for vacuum triodes
(2009) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 5118435, pp. 3006-3009. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70350143403&doi=10.1109%2fISCAS.2009.5118435&partnerID=40&md5=f3fc8d8f8feb6096d726a8c0b6187c5e

DOI: 10.1109/ISCAS.2009.5118435

Cardarilli, G.C., Di Nunzio, L., Re, M.
A full-adder based reconfigurable architecture for fine grain applications: ADAPTO
(2008) Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, art. no. 4675099, pp. 1304-1307. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-57849155918&doi=10.1109%2fICECS.2008.4675099&partnerID=40&md5=9265f14c8631734d6b05ab9baadb2f19

DOI: 10.1109/ICECS.2008.4675099

Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs
(2008) Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, art. no. 4674925, pp. 602-605. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-57849101790&doi=10.1109%2fICECS.2008.4674925&partnerID=40&md5=9630b30032fbb05b3f6aa3ba0f2f72de

DOI: 10.1109/ICECS.2008.4674925

Cardarilli, G.C., Nannarelli, A., Re, M.
Reducing power dissipation in pipelined accumulators
(2008) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 5074803, pp. 2098-2102. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-70349663969&doi=10.1109%2fACSSC.2008.5074803&partnerID=40&md5=b7ef563b21f760586e8a169e5a3be6bc

DOI: 10.1109/ACSSC.2008.5074803

Pontarelli, S., Cardarilli, G.C., Rey, M., Salsano, A.
A novel error detection and correction technique for RNS based FIR filters
(2008) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, art. no. 4641201, pp. 436-444. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-67649985266&doi=10.1109%2fDFT.2008.32&partnerID=40&md5=56b3bb603b351755f0401ae40f706939

DOI: 10.1109/DFT.2008.32

Quitadamo, L.R., Abbafati, M., Saggio, G., Marciani, M.G., Cardarilli, G.C., Bianchi, L.
A UML model for the description of different brain-computer interface systems
(2008) Proceedings of the 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBS'08 - "Personalized Healthcare through Technology", art. no. 4649418, pp. 1363-1366. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-61849141627&partnerID=40&md5=6ba359f35477610919f1064b275a14c0


Quitadamo, L.R., Abbafati, M., Saggio, G., Marciani, M.G., Cardarilli, G.C., Bianchi, L.
A UML model for the description of different brain-computer interface systems.
(2008) Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Conference, pp. 1363-1366. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84903873146&partnerID=40&md5=58af66dcb1d7e7def7592457d14550fb


Pontarelli, S., Cardarilli, G.C., Re, M., Salsano, A.
Totally fault tolerant RNS based FIR filters
(2008) Proceedings - 14th IEEE International On-Line Testing Symposium, IOLTS 2008, art. no. 4567092, pp. 192-194. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-52049123763&doi=10.1109%2fIOLTS.2008.14&partnerID=40&md5=2c9a67a07d69535a1d4351b2c7622d22

DOI: 10.1109/IOLTS.2008.14

Iacomacci, F., Morlet, C., Autelitano, F., Cardarilli, G.C., Re, M., Petrongari, E., Bogo, G., Franceschelli, M.
A software defined radio architecture for a regenerative on-board processor
(2008) Proceedings of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008, art. no. 4584269, pp. 164-171. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-51949109456&doi=10.1109%2fAHS.2008.37&partnerID=40&md5=1eb72dbb190f2de79cbd91a7e21f2efc

DOI: 10.1109/AHS.2008.37

Cardarilli, G.C., Di Nunzio, L., Re, M., Nannarelli, A.
ADAPTO: Full-adder based reconfigurable architecture for bit level operations
(2008) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 4542197, pp. 3434-3437. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-51749087235&doi=10.1109%2fISCAS.2008.4542197&partnerID=40&md5=0b9230dce467fcd70962520f0ef60116

DOI: 10.1109/ISCAS.2008.4542197

Quitadamo, L.R., Marciani, M.G., Cardarilli, G.C., Bianchi, L.
Describing different brain computer interface systems through a unique model: A UML implementation
(2008) Neuroinformatics, 6 (2), pp. 81-96. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-50849136480&doi=10.1007%2fs12021-008-9015-0&partnerID=40&md5=f4536b5a66fe43018319ad1e05af77f5

DOI: 10.1007/s12021-008-9015-0

Pontarelli, S., Ottavi, M., Vankamamidi, V., Cardarilli, G.C., Lombardi, F., Salsano, A.
Analysis and evaluations of reliability of reconfigurable FPGAs
(2008) Journal of Electronic Testing: Theory and Applications (JETTA), 24 (1-3), pp. 105-116. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-40949094352&doi=10.1007%2fs10836-007-5040-4&partnerID=40&md5=dc4a75288afb3890dc3f6aaa08efb569

DOI: 10.1007/s10836-007-5040-4

Cardarilli, G.C., Nannarelli, A., Re, M.
Residue number system for low-power DSP applications
(2007) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 4487461, pp. 1412-1416. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-50249150258&doi=10.1109%2fACSSC.2007.4487461&partnerID=40&md5=61f63f1db0f420fd38d829da8511ec7e

DOI: 10.1109/ACSSC.2007.4487461

Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Impact of RNS coding overhead on FIR filters performance
(2007) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 4487464, pp. 1426-1429. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-50249155881&doi=10.1109%2fACSSC.2007.4487464&partnerID=40&md5=5a9a77128c570e5483cf2f9d0b8947e4

DOI: 10.1109/ACSSC.2007.4487464

Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
Analysis of errors and erasures in parity sharing RS codecs
(2007) IEEE Transactions on Computers, 56 (12), pp. 1721-1726. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-36348957465&doi=10.1109%2fTC.2007.70773&partnerID=40&md5=72c54334dd9e0bd8f3765ec8387770ab

DOI: 10.1109/TC.2007.70773

Altamura, P., Cardarilli, G.C., Re, M., Del Re, A.
Hardware implementation of an echo-canceller for DVB-T on-channel repeaters
(2007) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 4487367, pp. 987-989. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-50249084502&doi=10.1109%2fACSSC.2007.4487367&partnerID=40&md5=b92eb4446f176467d918d088e26cc24f

DOI: 10.1109/ACSSC.2007.4487367

Pontarelli, S., Sterpone, L., Cardarilli, G.C., Re, M., Reorda, M.S., Salsano, A., Violante, M.
Self checking circuit optimization by means of fault injection analysis: A case study on reed solomon decoders
(2007) Proceedings - IOLTS 2007 13th IEEE International On-Line Testing Symposium, art. no. 4274846, pp. 194-196. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-46749147614&doi=10.1109%2fIOLTS.2007.58&partnerID=40&md5=231fa80836fb8c555190ceb8202df153

DOI: 10.1109/IOLTS.2007.58

Malatesta, A., Quitadamo, L.R., Abbafati, M., Bianchi, L., Marciani, M.G., Cardarilli, G.C.
Moving towards a hardware implementation of the independent component analysis for brain computer interfaces
(2007) Conference Proceedings - IEEE Biomedical Circuits and Systems Conference Healthcare Technology, BiOCAS2007, art. no. 4463350, pp. 227-230. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77956380083&doi=10.1109%2fBIOCAS.2007.4463350&partnerID=40&md5=c0bcd3e935a5ced04714927600d83d08

DOI: 10.1109/BIOCAS.2007.4463350

Pontarelli, S., Sterpone, L., Cardarilli, G.C., Re, M., Reorda, M.S., Salsano, A., Violante, M.
Optimization of self checking FIR filters by means of fault injection analysis
(2007) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, art. no. 4358377, pp. 96-102. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77649292554&doi=10.1109%2fDFT.2007.23&partnerID=40&md5=334fc1bee7a9f20419d5a97203f44584

DOI: 10.1109/DFT.2007.23

Bernocchi, G.L., Cardarilli, G.C., Del Re, A., Nannarell, A., Re, M.
Low-power adaptive filter based on RNS components
(2007) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 4253362, pp. 3211-3214. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34548846407&partnerID=40&md5=ed3b84e48321823f065629f8cebed3c7


Violante, M., Sterpone, L., Manuzzato, A., Gerardin, S., Rech, P., Bagatin, M., Paccagnella, A., Andreani, C., Gorini, G., Pietropaolo, A., Cardarilli, G., Pontarelli, S., Frost, C.
A new hardware/software platform and a new 1/E neutron source for soft error studies: Testing FPGAs at the ISIS facility
(2007) IEEE Transactions on Nuclear Science, 54 (4), pp. 1184-1189. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34548090964&doi=10.1109%2fTNS.2007.902349&partnerID=40&md5=71b304c7518771eda68c34410b4dcfbe

DOI: 10.1109/TNS.2007.902349

Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
Concurrent error detection in Reed-Solomon encoders and decoders
(2007) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 15 (7), pp. 842-846. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34347224736&doi=10.1109%2fTVLSI.2007.899241&partnerID=40&md5=4e10ed90cbf78f78c33ffe1075a46029

DOI: 10.1109/TVLSI.2007.899241

Bianchi, L., Quitadamo, L.R., Garreffa, G., Cardarilli, G.C., Marciani, M.G.
Performances evaluation and optimization of brain computer interface systems in a copy spelling task
(2007) IEEE Transactions on Neural Systems and Rehabilitation Engineering, 15 (2), pp. 207-216. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34250768643&doi=10.1109%2fTNSRE.2007.897024&partnerID=40&md5=547276f29e32228301ee14dbd87f9f0e

DOI: 10.1109/TNSRE.2007.897024

Bianchi, L., Quitadamo, L.R., Garreffa, G., Cardarilli, G.C., Marciani, M.G.
Performances evaluation and optimization of brain computer interface systems in a copy spelling task
(2007) IEEE Transactions on Neural Systems and Rehabilitation Engineering, 15 (1), pp. 207-216. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-77955061101&doi=10.1109%2fTNSRE.2007.897024&partnerID=40&md5=e83af610c2c206bce65cb8c17cb8c020

DOI: 10.1109/TNSRE.2007.897024

Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
Fault tolerant design of signed digit based FIR filters
(2006) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 1693208, pp. 2809-2812. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547256348&partnerID=40&md5=1600f467c7a5cb900a2fef96e858a2ed


Bianchi, D., Cardarilli, G.C., Del Re, A., Re, M.
Optimized Viterbi decoder for low data rate systems
(2006) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 4176748, pp. 1166-1169. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-47049096664&doi=10.1109%2fACSSC.2006.354938&partnerID=40&md5=83f97b79fbb1cdb218a4f2748db8ccd5

DOI: 10.1109/ACSSC.2006.354938

Cardarilli, G.C., Del Re, A., Re, M., Simone, L.
Optimized QPSK modulator for DVB-S applications
(2006) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 1692899, pp. 1571-1574. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547299609&partnerID=40&md5=22fa7bedaa1a6a7e3e4edae54624499d


Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
Concurrent error detection in reed solomon decoders
(2006) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 1692869, pp. 1451-1454. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547378006&partnerID=40&md5=820dc44af943493a1707fabb184a3e20


Bernocchi, G.L., Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
A hybrid RNS adaptive filter for channel equalization
(2006) Conference Record - Asilomar Conference on Signals, Systems and Computers, art. no. 4176862, pp. 1706-1710. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-47049084304&doi=10.1109%2fACSSC.2006.355052&partnerID=40&md5=5a71252971f66c93df1c548f968683c9

DOI: 10.1109/ACSSC.2006.355052

Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Localization of faults in radix-n signed digit adders
(2006) Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium, 2006, art. no. 1655540, pp. 178-180. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34247249409&doi=10.1109%2fIOLTS.2006.42&partnerID=40&md5=11f92f081ed290cbe202e50f35eb9536

DOI: 10.1109/IOLTS.2006.42

Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders
(2006) IEEE Transactions on Computers, 55 (5), pp. 534-540. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33645800592&doi=10.1109%2fTC.2006.76&partnerID=40&md5=7c117ccc9ab7bf47a83e254473ac776d

DOI: 10.1109/TC.2006.76

Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
A self checking reed solomon encoder: Design and analysis
(2005) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 111-119. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-28444473425&partnerID=40&md5=5ebd689bf6abe23450cf66e0b4786c3c


Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
FPGA oriented design of parity sharing RS codecs
(2005) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 259-265. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-28444435116&partnerID=40&md5=8382bf989b11066fce3093d2b01d541a


Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Low power and low leakage implementation of RNS FIR filters
(2005) Conference Record - Asilomar Conference on Signals, Systems and Computers, 2005, art. no. 1600042, pp. 1620-1624. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33847690261&partnerID=40&md5=c46c2d36dd871af889e71782076e0afc


Cardarilli, G.C., Pontarelli, S., Re, M., Salsano, A.
Design of a self checking reed solomon encoder
(2005) Proceedings - 11th IEEE International On-Line Testing Symposium, IOLTS 2005, 2005, art. no. 1498159, pp. 201-202. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33745504753&doi=10.1109%2fIOLTS.2005.21&partnerID=40&md5=7974a6d5f7e4b7849731609ca19a7a1c

DOI: 10.1109/IOLTS.2005.21

Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter
(2005) Proceedings - IEEE International Symposium on Circuits and Systems, art. no. 1464785, pp. 1102-1105. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-67649099950&doi=10.1109%2fISCAS.2005.1464785&partnerID=40&md5=f40f7aab6a0e523f10e950b80b9b7a27

DOI: 10.1109/ISCAS.2005.1464785

Malatesta, A., Cardarilli, G.C., Re, M., Arnone, L., Bocchio, S.
Development and validation of hardware architectures for real-time high-performance speech recognition systems
(2005) 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, II, art. no. 1542980, pp. 434-436. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33750349848&doi=10.1109%2fRME.2005.1542980&partnerID=40&md5=b92a1e9088be50be9c412e6efff25d12

DOI: 10.1109/RME.2005.1542980

Bianchi, D., Cardarilli, G.C., Del Re, A., Malatesta, A., Re, M.
FPGA implementation of a general purpose HMM processor based on token passing algorithm
(2005) Proceedings of the 2005 European Conference on Circuit Theory and Design, 1, art. no. 1522966, pp. 285-288. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33749073867&doi=10.1109%2fECCTD.2005.1522966&partnerID=40&md5=1ed16cfd9aaeae2bbb4bd8a12b396bbf

DOI: 10.1109/ECCTD.2005.1522966

Ottavi, M., Schiano, L., Lombardi, F., Pontarelli, S., Cardarilli, G.C.
Evaluating the data integrity of memory systems by configurable Markov models
(2005) Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI, pp. 257-259. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-26844446449&doi=10.1109%2fISVLSI.2005.30&partnerID=40&md5=3b7807d54ec3141c8b5eeefc6efe0ae4

DOI: 10.1109/ISVLSI.2005.30

Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Fault tolerant solid state mass memory for space applications
(2005) IEEE Transactions on Aerospace and Electronic Systems, 41 (4), pp. 1353-1372. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-29844432425&doi=10.1109%2fTAES.2005.1561889&partnerID=40&md5=4c24c5b7c23e4109fba382c8c9906163

DOI: 10.1109/TAES.2005.1561889

Cardarilli, G.C., Lombardi, F., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
A comparative evaluation of designs for reliable memory systems
(2005) Journal of Electronic Testing: Theory and Applications (JETTA), 21 (4), pp. 429-444. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-23944458580&doi=10.1007%2fs10836-005-0975-9&partnerID=40&md5=ceb77fc49ec1679b91abc13c4e1fdd8c

DOI: 10.1007/s10836-005-0975-9

Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
A signed digit adder with error correction and graceful degradation capabilities
(2004) Proceedings - 10th IEEE International On-Line Testing Symposium, IOLTS 2004, pp. 141-146. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-10444254623&doi=10.1109%2fOLT.2004.1319672&partnerID=40&md5=3be3324ddf6fdca19d4d1408b940efcb

DOI: 10.1109/OLT.2004.1319672

Cardarilli, G.C., Malatesta, A., Re, M., Arnone, L., Rosti, A.
A unified SystemC-based framework for simulation, optimization and synthesis of complex systems implementing DSP algorithms
(2004) Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004, pp. 90-94. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-21544474724&partnerID=40&md5=1dfad0d0c59e043589beefd68fb9256e


Cardarilli, G.C., Malatesta, A., Re, M., Amone, L., Bocchio, S.
Hardware oriented architectures for continuous-speech speaker-independent ASR systems
(2004) Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004, pp. 346-352. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-21544482298&partnerID=40&md5=42a6c1eff07378e626b97d0f69ee77ab


Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Data integrity evaluations of Reed Solomon codes for storage systems
(2004) IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 158-164. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-24944520169&partnerID=40&md5=47d7ae704d3bfc3fc43b6682dc44ac72


Cardarilli, G.C., Comparini, C., Del Re, A., Re, M., Rossi, S., Simone, L.
On-board signal acquisition: System trade-offs and implementation
(2004) Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004, pp. 567-573. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-21544470259&partnerID=40&md5=4c3b4244812907248156e6d370f3eb2d


Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
A fault-tolerant solid state mass memory for highly reliable instrumentation
(2004) Conference Record - IEEE Instrumentation and Measurement Technology Conference, 3, pp. 1651-1656. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-4644281414&doi=10.1109%2fIMTC.2004.1351398&partnerID=40&md5=f49865b937e7daf03619ce834f3d6c21

DOI: 10.1109/IMTC.2004.1351398

Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Low-power implementation of polyphase filters in Quadratic Residue Number System
(2004) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. II725-II728. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-4344580699&partnerID=40&md5=778d220894bf87b8a12cce6f0c474eb6


Scrimaglio, R., Finetti, N., D'Altorio, L., Rantucci, E., Raso, M., Segreto, E., Tassoni, A., Cardarilli, G.C.
A neural network device for on-line particle identification in cosmic ray experiments
(2004) Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 524 (1-3), pp. 152-161. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-2342492426&doi=10.1016%2fj.nima.2004.01.052&partnerID=40&md5=fc45376467d8657af424837e9a3c1ce4

DOI: 10.1016/j.nima.2004.01.052

Cardarilli, G.C., Re, A.D., Lojacono, R., Nannarelli, A., Re, M.
RNS implementation of high performance filters for satellite demultiplexing
(2003) IEEE Aerospace Conference Proceedings, 3, art. no. 1235253, pp. 1365-1379. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84879382128&doi=10.1109%2fAERO.2003.1235253&partnerID=40&md5=e20d1e9ab075144fa60782f229334d65

DOI: 10.1109/AERO.2003.1235253

Cardarilli, G.C., Comparini, C., Re, A.D., Re, M., Simone, L.
On-board signal acquisition: System trade-offs and implementation
(2003) IEEE Aerospace Conference Proceedings, 3, art. no. 1235266, pp. 1457-1464. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84879336439&doi=10.1109%2fAERO.2003.1235266&partnerID=40&md5=2c309d066b3c8db8c3bda5618f6e9ab9

DOI: 10.1109/AERO.2003.1235266

Cardarilli, G.C., Leandri, A., Marinucci, P., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Design of a Fault Tolerant Solid State Mass Memory
(2003) IEEE Transactions on Reliability, 52 (4), pp. 476-491. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0742324992&doi=10.1109%2fTR.2003.821938&partnerID=40&md5=82410db9c3a6257ad2681450e5ee75d6

DOI: 10.1109/TR.2003.821938

Cardarilli, G.C., Del Re, A., Re, M.
IP based reconfigurable digital platform for satellite communications
(2003) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. II37-II40. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-17144474149&partnerID=40&md5=3ecc4e12ff66888eec73dd54b7ec54d9


Nannarelli, A., Cardarilli, G.C., Re, M.
Power-delay tradeoffs in residue number system
(2003) Proceedings - IEEE International Symposium on Circuits and Systems, 5, pp. V413-V416. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0038758712&partnerID=40&md5=055d57d1113b4f21751d623a904f6bdc


Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
A fault tolerant hardware based file system manager for solid state mass memory
(2003) Proceedings - IEEE International Symposium on Circuits and Systems, 5, pp. V649-V652. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0038757965&partnerID=40&md5=a1d2244d0e069f87b70cf548ccaa0586


Cardarilli, G.C., Ottavi, M., Pontarelli, S., Re, M., Salsano, A.
Error detection in signed digit arithmetic circuit with parity checker
(2003) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2003-January, art. no. 1250137, pp. 401-408. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84971238299&doi=10.1109%2fTSM.2005.1250137&partnerID=40&md5=b27a394b58278652a7df6a367c8616f4

DOI: 10.1109/TSM.2005.1250137

Re, M., Del Re, A., Cardarilli, G.C.
Efficient implementation of a demultiplexer based on a multirate filter bank for the skyplex satellites DVB system
(2002) VLSI Design, 15 (1), pp. 427-440. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0036704635&doi=10.1080%2f1065514021000012048&partnerID=40&md5=f339b9c961af73a90e7a1ceca9b117fd

DOI: 10.1080/1065514021000012048

Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Power characterization of digital filters implemented on FPGA
(2002) Proceedings - IEEE International Symposium on Circuits and Systems, 5, pp. V/801-V/804. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0036288069&partnerID=40&md5=0920989969b7d7a192ce4e8fb0a546ae


Altamura, P., Cardarilli, G.C., Del Re, A., Re, M.
OFDM modem for ATM based point-multipoint systems
(2002) ICCSC 2002 - 1st IEEE International Conference on Circuits and Systems for Communications, Proceedings, 2002-June, art. no. 1029064, pp. 138-141. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84990975320&doi=10.1109%2fOCCSC.2002.1029064&partnerID=40&md5=467fcd6cc1494a099bd7248a8738fbe7

DOI: 10.1109/OCCSC.2002.1029064

Cardarilli, G.C., Del Re, A., Nannarelli, A., Re, M.
Residue number system reconfigurable datapath
(2002) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. II/756-II/759. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0036296637&partnerID=40&md5=1c800eaba9068ac33f752cbf078affd4


Bartolazzi, A., Cardarilli, G., Del Re, A., Giancristofaro, D., Re, M.
Implementation of DVB-RCS turbo decoder for satellite on-board processing
(2002) ICCSC 2002 - 1st IEEE International Conference on Circuits and Systems for Communications, Proceedings, 2002-June, art. no. 1029065, pp. 142-145. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84990898338&doi=10.1109%2fOCCSC.2002.1029065&partnerID=40&md5=f50a028dde00ad86a4159e045ab3834e

DOI: 10.1109/OCCSC.2002.1029065

Cardarilli, G.C., Del Re, A., Lojacono, R., Nannarelli, A., Re, M.
Performance comparison between traditional and RNS-based ADC.
(2002) 4th IMEKO TC4 Conference on Advanced A/D and D/A Conversion Techniques and Their Applications and the 7th Workshop on ADC Modelling and Testing 2002, . 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84909952856&partnerID=40&md5=2c04d58af11f5a80f6bda15fc5364318


Cardarilli, G., Del Re, A., Giancristofaro, D., Re, M., Simone, L.
Digital modulator architectures for satellite and space applications
(2002) ICCSC 2002 - 1st IEEE International Conference on Circuits and Systems for Communications, Proceedings, 2002-June, art. no. 1029071, pp. 166-169. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84990990574&doi=10.1109%2fOCCSC.2002.1029071&partnerID=40&md5=f6ada6257a5bd3ec59b5f9b898b2c1d5

DOI: 10.1109/OCCSC.2002.1029071

Cardarilli, G.C., Kaddour, F., Leandri, A., Ottavi, M., Pontarelli, S., Velazco, R.
Bit flip injection in processor-based architectures: A case study
(2002) Proceedings of the 8th IEEE International On-Line Testing Workshop, IOLTW 2002, art. no. 1030194, pp. 117-127. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84962664102&doi=10.1109%2fOLT.2002.1030194&partnerID=40&md5=d8937676ef3311a6c52d84b7db9f1398

DOI: 10.1109/OLT.2002.1030194

Pontarelli, S., Cardarilli, G.C., Leandri, A., Ottavi, M., Re, M., Salsano, A.
A self-checking cell logic block for fault tolerant FPGAs
(2002) Proceedings - IEEE International Symposium on Circuits and Systems, 4, pp. IV/477-IV/480. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0036294930&partnerID=40&md5=d1e600480e4d0f4634d3e13f25c94a4d


Nannarelli, A., Re, M., Cardarilli, G.C.
Tradeoffs between residue number system and traditional FIR filters
(2001) ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, 2, art. no. 921068, pp. 305-308. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035011992&doi=10.1109%2fISCAS.2001.921068&partnerID=40&md5=8daa28239c95c932d8046488ec05bf73

DOI: 10.1109/ISCAS.2001.921068

Re, M., Nannarelli, A., Cardarilli, G.C., Lojacono, R.
FPGA realization of RNS to binary signed conversion architecture
(2001) ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, 4, art. no. 922245, pp. 350-353. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84888042603&doi=10.1109%2fISCAS.2001.922245&partnerID=40&md5=5d8e14a19997278b78c2a228de716de6

DOI: 10.1109/ISCAS.2001.922245

Ottavi, M., Cardarilli, G.C., Marinucci, P., Pontarelli, S., Salsano, M.Re.A.
Development of a dynamic routing system for a fault tolerant solid state mass memory
(2001) ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, 4, art. no. 922366, pp. 830-833. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84888053823&doi=10.1109%2fISCAS.2001.922366&partnerID=40&md5=327c3c1bf979644282a02c22eb3f82a8

DOI: 10.1109/ISCAS.2001.922366

Bertazzoni, S., Cardarilli, G.C., Di Giovenale, D., Ottavi, M., Pontarelli, S., Salsano, A., Marinuccii, P.
Sistemi elettronici tolleranti ai guasti per applicazioni spaziali
(2001) Alta Frequenza Rivista Di Elettronica, 13 (3), p. 20. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035327904&partnerID=40&md5=6aac384106375ec9ca6d228857f9e8e9


Ferri, G., Cardarilli, G.-C., Re, M.
Rail-to-rail adaptive biased low-power Op-Amp
(2001) Microelectronics Journal, 32 (3), pp. 265-272. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035280969&doi=10.1016%2fS0026-2692%2800%2900132-4&partnerID=40&md5=96c72f57daaa66ed674d3b5f4855c221

DOI: 10.1016/S0026-2692(00)00132-4

Re, M., Nannarelli, A., Cardarilli, G.C., Lojacono, R.
FPGA realization of RNS to binary signed conversion architecture
(2001) Materials Research Society Symposium - Proceedings, 626, pp. IV350-IV353. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035030896&partnerID=40&md5=6f4cac150fb9b4f3a9dd188469d4ef85


Nannarelli, A., Re, M., Del Re, A., Cardarilli, G.C., Lojacono, R.
High speed RNS A/D front end
(2001) 11th IMEKO TC4 Symposium on Trends in Electrical Measurements and Instrumentation and 6th IMEKO TC4 Workshop on ADC Modelling and Testing 2001, pp. 502-505. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84943338955&partnerID=40&md5=644d72994affa4ac1ae7aa6844d560dd


Pontarelli, S., Cardarilli, G.C., Malvoni, A., Ottavi, M., Re, M., Salsano, A.
System-on-chip oriented fault-tolerant sequential systems implementation methodology
(2001) IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 455-460. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035193913&partnerID=40&md5=2eccad3c93e187d8c28c8a155a2f63dd


Ottavi, M., Cardarilli, G.C., Marinucci, P., Pontarelli, S., Re, M., Salsano, A.
Development of a dynamic routing system for a fault tolerant solid state mass memory
(2001) Materials Research Society Symposium - Proceedings, 626, pp. IV830-IV833. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035036552&partnerID=40&md5=17a473ea7cc2b0715ad9b059dbbe3874


Ottavi, M., Cardarilli, G.C., Cellitti, D., Pontarelli, S., Re, M., Salsano, A.
Design of a totally self checking signature analysis checker for finite state machines
(2001) IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 403-411. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0035193988&partnerID=40&md5=8069b5383e069179db9f669b55c551d1


D'Amora, A., Nannarelli, A., Re, M., Cardarilli, G.C.
Reducing power dissipation in complex digital filters by using the Quadratic Residue Number System
(2000) Conference Record of the Asilomar Conference on Signals, Systems and Computers, 2, pp. 879-883. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0034445482&partnerID=40&md5=10c8bacfc3f9c12ec41e166fcdf452b6


Cardarilli, G.C., Marinucci, P., Ottavi, M., Salsano, A.
Fault-tolerant 176 Gbit Solid State Mass Memory architecture
(2000) IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 173-182. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0034509287&partnerID=40&md5=8ec7fcb5a4887da791a762b9e4f8eab4


Cardarilli, G.C., Nannarelli, A., Re, M.
Reducing power dissipation in FIR filters using the residue number system
(2000) Midwest Symposium on Circuits and Systems, 1, pp. 320-323. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0034463373&partnerID=40&md5=1db636fef15df141dc05ca87f69f5efd


Cardarilli, G.C., Re, M., Lojacono, R., Ferri, G.
A systolic architecture for high-performance scaled residue to binary conversion
(2000) IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 47 (10), pp. 1523-1526. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0034290936&doi=10.1109%2f81.886982&partnerID=40&md5=0dc9cf581666e45580d4be0d8b19b623

DOI: 10.1109/81.886982

Cardarilli, G.-C., Ferri, G., Re, M.
Low-power CMOS OTA input stages and voltage buffers based on adaptive biasing topology
(2000) Microelectronics Journal, 31 (3), pp. 153-159. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033890276&doi=10.1016%2fS0026-2692%2899%2900109-3&partnerID=40&md5=6a56e589f36fa2654dc87f90b8fa1246

DOI: 10.1016/S0026-2692(99)00109-3

Re, Marco, Cardarilli, Gian Carlo, Del Re, Andrea, Lojacono, Roberto
FPGA implementation of a demux based on a multirate filter bank
(2000) Proceedings - IEEE International Symposium on Circuits and Systems, 5, pp. V-353-V-356. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033726022&partnerID=40&md5=bf4fb0dc9bf47b2f5db5df6f8ba1b567


Cardarilli, G.C., Marinucci, P., Salsano, A.
Development of an evaluation model for the design of fault-tolerant Solid State Mass Memory
(2000) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. II-673-II-676. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033720592&partnerID=40&md5=be6940cfa2a9af0dbd9ac085ef620361


Re, Marco, Salmeri, Marcello, Cardarilli, Gian Carlo
CAD environment for fuzzy systems HW/SW mapping
(2000) Proceedings - IEEE International Symposium on Circuits and Systems, 4, pp. IV-221-IV-224. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033682522&partnerID=40&md5=2d5c0ad5a3bb531762c8408457a99ba0


Salmeri, M., Re, M., Petrongari, E., Cardarilli, G.C.
Novel bacterial algorithm to extract the rule base from a training set
(2000) IEEE International Conference on Fuzzy Systems, 2, pp. 759-761. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033715304&partnerID=40&md5=8085ef912b22834ebfb22a869e4db5da


Cardarilli, G.C., Marinucci, P., Bertazzoni, S., Salmeri, M., Salsano, A.
Design of fault-tolerant solid state mass memory
(1999) IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 302-310. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033356634&partnerID=40&md5=2d9603ad62e466180a07651007bcff3c


Re, Marco, Cardarilli, Gian Carlo, Del Re, Andrea, Lojacono, Roberto, Rovigatti, G., Piloni, V.
Efficient implementation of a filter bank architecture for demultiplexing in satellites applications
(1999) Conference Record of the Asilomar Conference on Signals, Systems and Computers, 1, pp. 569-573. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033332735&partnerID=40&md5=b64bb64716333838cf80e2f76513cfb0


Bertazzoni, S., Cardarilli, G.C., Piergentili, D., Salmeri, M., Salsano, A., Giovenale, D.Di, Grande, G.C., Marinucci, P., Sperandei, S., Bartalucci, S., Mazzenga, G., Ricci, M., Bidoli, V., De Francesco, D., Picozza, P.G.
Failure tests on 64 Mb SDRAM in radiation environment
(1999) IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 158-164. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033334978&partnerID=40&md5=9ad6075a5490e6728976e016419ba9b4


Cardarilli, G.-C., Ferri, G., Re, M.
CMOS and bipolar novel low-power adaptive biasing topologies
(1999) Microelectronics Journal, 30 (3), pp. 223-227. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0033092790&partnerID=40&md5=70d632d923efbc528e70d496b606f1e8


Ferri, G., Alfonsetti, F., Cardarilli, G.-C., Re, M.
Bipolar and CMOS low voltage-supply reduced-power voltage followers
(1999) Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 3, art. no. 814455, pp. 1503-1506. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84940377774&doi=10.1109%2fICECS.1999.814455&partnerID=40&md5=c833354b7b7870e98d02d34b18b14d8e

DOI: 10.1109/ICECS.1999.814455

Cardarilli, Gian-Carlo, Ferri, Giuseppe, Bordoni, Franco
Bipolar adaptive biasing topology for low-power applications
(1999) Alta Frequenza Rivista Di Elettronica, 11 (1), pp. 50-52. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0032595112&partnerID=40&md5=dd86d30d55d41158eb09cc9ebdc88008


Vincentelli, A.Sangiovanni, Re, M., Lavagno, L., Cardarilli, G.C., Lojacono, R.
Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion
(1999) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. II-334 - II-338. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0032736636&partnerID=40&md5=5719148ff97ed1e3ff7d3f6778a3aead


Cardarilli, G.C., Re, M., Lojacono, R.
VLSI implementation of a real time fuzzy processor
(1998) Journal of Intelligent and Fuzzy Systems, 6 (3), pp. 389-401. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-26844476006&partnerID=40&md5=46b0e35bf431f517172d26ee3237ba59


Cardarilli, G.C., Re, M., Lojacono, R.
RNS-to-binary conversion for efficient vlsi implementation
(1998) IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 45 (6), pp. 667-669. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0032095889&doi=10.1109%2f81.678485&partnerID=40&md5=63d72b8eaf83f290bf8c06792104b299

DOI: 10.1109/81.678485

Cardarilli, G.C., Re, M., Ferri, G.
1.6 V 80 μW rail-to-rail constant-GM bipolar adaptive biased Op-Amp input stage
(1998) Proceedings - IEEE International Symposium on Circuits and Systems, 1, pp. 452-455. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031632078&partnerID=40&md5=07ac6921040cc0eec17577fd22d8d0dd


Cardarilli, G.C., Marinucci, P., Salsano, A.
Fault-tolerant solid state mass memory for satellite applications
(1998) Conference Record - IEEE Instrumentation and Measurement Technology Conference, 1, pp. 253-256. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031677412&partnerID=40&md5=4ea1067da5ecca4cdf78f6a7b9c9499f


Cardarilli, G.C., Re, M., Lojacono, R., Ferri, G.
High speed VLSI architecture for scaled residue to binary conversion
(1998) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. 414-416. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031628348&partnerID=40&md5=3283ab86ef4525e7b9ffae5dab2186f2


Bertazzoni, S., Cardarilli, G.C., Iannuccelli, M., Salmeri, M., Salsano, A., Simonelli, O.
16-point high speed (I)FFT for OFDM modulation
(1998) Proceedings - IEEE International Symposium on Circuits and Systems, 5, pp. V-210-V-212. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031618933&partnerID=40&md5=8052fcad582501dc35d0824753ce5f99


Cardarilli, Gian-Carlo, Ferri, Giuseppe
CMOS adaptive biasing circuits for low-power applications
(1997) Proceedings of the International Conference on Microelectronics, 2, pp. 747-750. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031368982&partnerID=40&md5=7fc7ae12145561a7ee92f4f102a1a1f7


Cardarilli, G.C., Re, M., Lojacono, R.
New RNS FIR filter architecture
(1997) International Conference on Digital Signal Processing, DSP, 2, pp. 671-674. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031366726&partnerID=40&md5=631bfdabc4da25ed501d3206ecd6b2f3


Cardarilli, Gian Carlo, Salmeri, Marcello, Salsano, Adelio, Simonelli, Osvaldo
Low voltage swing circuits for low dissipation busses
(1997) Proceedings - IEEE International Symposium on Circuits and Systems, 3, pp. 1868-1871. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0030711833&partnerID=40&md5=d68f7399f29e0632cd3a3788e8a829aa


Cardarilli, G.C., Re, M., Lojacono, R.
Efficient modulo extraction for CRT based residue to binary converters
(1997) Proceedings - IEEE International Symposium on Circuits and Systems, 3, pp. 2036-2039. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0030683310&partnerID=40&md5=8f9354b2539760340e5886ce7ee9238d


Ferri, Giuseppe, Sansen, Willy, Cardarilli, Gian-Carlo
Low-voltage reduced-power constant-Gm rail-to-rail fully differential CMOS OP-AMP
(1996) Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 2, pp. 1170-1173. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0030349825&partnerID=40&md5=a3b8aa40134879ffed8a7a9c4c3fbd46


Cardarilli, Gian Carlo, Salmeri, Marcello, Salsano, Adelio, Simonelli, Osvaldo
Bus architecture for low-power VLSI digital circuits
(1996) Proceedings - IEEE International Symposium on Circuits and Systems, 4, pp. 21-24. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0029694610&partnerID=40&md5=5e7db6078b91f1edb0dbe2a32a1b584f


Cardarilli, G.C., Di Stefano, O., Fabrizi, G., Marinucci, P.
Analysis and implementation of a VLSI neural network
(1995) IEEE International Conference on Neural Networks - Conference Proceedings, 3, pp. 1482-1486. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0029511891&partnerID=40&md5=4c6c8677244f83f5f897775322e07f41


Bertazzoni, S., Cardarilli, G.C., Lojacono, R., Salmeri, M., Salsano, A., Simonelli, O.
VLSI implementation of a Learning Actractor Neuronal Network (LANN)
(1995) International Conference on Solid-State and Integrated Circuit Technology Proceedings, pp. 331-333. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0029453164&partnerID=40&md5=4fe06aaf0cd81a9eda42f0eec9849804


Bordoni, F., Yinghua, L., Spataro, B., Feliciangeli, F., Vasarelli, F., Cardarilli, G., Antonini, B., Scrimaglio, R.
A microwave scanning surface harmonic microscope using a re-entrant resonant cavity
(1995) Measurement Science and Technology, 6 (8), art. no. 017, pp. 1208-1214. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0029360116&doi=10.1088%2f0957-0233%2f6%2f8%2f017&partnerID=40&md5=30d34bdef4705312aa8995aa4a76d627

DOI: 10.1088/0957-0233/6/8/017

Cardarilli, G.C., Lojacono, R., Salerno, M., Sargeni, F.
VLSI implementation of a cellular neural network with programmable control operator
(1993) Midwest Symposium on Circuits and Systems, 2, pp. 1089-1092. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0027754875&partnerID=40&md5=ede298f8852d7bb4669e184713cf25c8


Cardarilli, G.C., Sargeni, F.
Very efficient VLSI implementation of CNN with discrete templates
(1993) Electronics Letters, 29 (14), pp. 1286-1287. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0027912059&partnerID=40&md5=42169de5f3d52ba364d958454349195a


Cardarilli, G., Dizenzo, M., Pistilli, P., Salsano, A.
A high speed reed-solomon encoder-decoder for fault tolerant solid state disks
(1993) Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 1993-January, art. no. 595613, pp. 33-40. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84889434529&doi=10.1109%2fDFTVS.1993.595613&partnerID=40&md5=3a3c6dedf817a3e44269735c666b77ed

DOI: 10.1109/DFTVS.1993.595613

Cardarilli, G.C., Lojacono, R., Salerno, M., Sargeni, F.
Single chip implementation of real time RNS IIR digital filters
(1992) EURO ASIC '92, pp. 314-317. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0026971601&partnerID=40&md5=c8d51614952f83e21930123d11e7eaa3


Cardarilli, G.‐C., Hasler, M.
Letter limit cycles in residue number system filters
(1992) European Transactions on Telecommunications, 3 (5), pp. 479-483. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84985773508&doi=10.1002%2fett.4460030508&partnerID=40&md5=0cad005053057a6001e89fbf0e076e6b

DOI: 10.1002/ett.4460030508

Salerno, M., Cardarilli, G.C., Lojacono, R., Sargeni, F.
Search of optimal RNS IIR digital filter implementation
(1991) Midwest Symposium on Circuits and Systems, 2, pp. 1074-1077. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0026387582&partnerID=40&md5=912ad9bf8a4146bae07b705da13a6a86


Salerno, M., Cardarilli, G.C., Lojacono, R., Sargeni, F.
RNS approach to full parallel linear combinators
(1990) ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, 2, pp. 925-928. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0025670802&partnerID=40&md5=a10fbde5cfebefecbcc15611dff77cf1


Salerno, M., Cardarilli, G.C., Lojacono, R., Sargeni, F.
A finite arithmetic implementation of recursive digital filters
(1990) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. 1256-1259. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0025683575&partnerID=40&md5=2d400a4752861d46274a50ae48376bbe


Burrascano, P., Cardarilli, G.C., Lojacono, R., Martinelli, G., Salerno, M.
Properties and Synthesis of RNS Digital Circuits
(1990) IEEE Transactions on Circuits and Systems, 37 (7), pp. 903-911. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0025465296&doi=10.1109%2f31.55065&partnerID=40&md5=38d90f5a68cdb9242ccc1789eb8179e5

DOI: 10.1109/31.55065

Cardarilli, G.C., Lojacono, R., Salerno, M.
RNS realization of fast fixed-point multipliers with large wordlengths
(1989) Proceedings - IEEE International Symposium on Circuits and Systems, 1, pp. 212-215. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0024929636&partnerID=40&md5=e262e44a8b181faf29a8e9e8b5d2c3fb


Burrascanc, P., Cardarilli, G.C., Lojacano, R., Martinelli, G., Salerno, M.
RNS Adaptive Lattice Predictor
(1989) IEEE Transactions on Circuits and Systems, 36 (1), pp. 167-169. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84939362230&doi=10.1109%2f31.16593&partnerID=40&md5=3e6d758f82f948f04c252abcd7253ab8

DOI: 10.1109/31.16593

Cardarilli, G.C., Lojacono, R., Salerno, M.
Rns approach to adaptive Burg algorithm
(1988) pp. 130-133. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0024121919&partnerID=40&md5=2b99a0e621cbfe58b1d60d1b99cded2c


Burrascano, P., Cardarilli, G.C., Lojacono, R., Martinelli, G., Salerno, M.
Application of number theory to structurally passive digital filters
(1988) Proceedings - IEEE International Symposium on Circuits and Systems, 2, pp. 1775-1778. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0024124304&partnerID=40&md5=f5a9aeb692589e9e00b61f6771f8917e


Cardarilli, G.C., Lojacono, R., Salerno, M.
Structurally passive digital filters in residue number systems
(1988) IEEE Transactions on Circuits and Systems, 35 (2), pp. 149-158. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0023965880&doi=10.1109%2f31.1716&partnerID=40&md5=d676c46abc06c3cb9265aaf29956b912

DOI: 10.1109/31.1716

Burrascano, P., Cardarilli, G.C., Lojacono, R., Martinelli, G., Salerno, M.
RNS FOURIER TRANSFORMS.
(1988) ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, pp. 1427-1430. 
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0023795960&partnerID=40&md5=8a9268d0b1a570fb71bb50503984614d


Cardarilli, G.-C., Hasler, M.
NONLINEAR EFFECTS IN DIGITAL TRANSMISSION SYSTEMS.
(1987) Mitteilungen AGEN, 46, pp. 37-40. 
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Cardarilli, G.C., Lojacono, R., Martinelli, G., Salerno, M.
REALIZATION OF GIVENS PLANAR ROTATOR IN THE RESIDUE NUMBER SYSTEMS.
(1987) Proceedings - IEEE International Symposium on Circuits and Systems, pp. 136-139. 
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Lojacono, R., Cardarilli, G.C., Sacchetta, S.
GENERALISED DESIGN PROCEDURE FOR MQF.
(1987) pp. 323-330. 
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Cardarilli, G.C., Lojacono, R., Sacchetta, S., Salerno, M., Salsano, A.
PARALLEL ARCHITECTURES FOR VLSI FULL CUSTOM DEVICES IN SIGNAL PROCESSING AND SENSING.
(1987) pp. 177-178. 
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Cardarilli, G.C., Lojacono, R., Salerno, M., Sacchetta, S., Salsano, A.
DESIGN OF SELF-CHECKING VLSI ELEMENTARY CELLS FOR DSP APPLICATIONS.
(1987) pp. 486-488. 
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Cardarilli, G.C., Lojacono, R., Martinelli, G., Salerno, M., Sacchetta, S.
VLSI REALIZATION OF A FAST MULTIPLIER IN FINITE ARITHMETIC.
(1987) pp. 377-380. 
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Cardarilli, Gian Carlo, Sacchetta, Silvana, Salerno, Mario, Salsano, Adelio, Lojacono, Roberto
PIPELINE ARCHITECTURE OF A PREDICTION ALGORITHM FOR SUBMARINE HIGH-RESOLUTION GEOPHYSICAL PROSPECTING.
(1986) pp. 538-544. 
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